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A Flexible and Energy-Efficient Accelerator for Graph Convolutional Neural Networks
Researchers at GW have invented a flexible and energy-efficient accelerator for graph convolutional neural networks (GCN). First, the novel accelerator design disclosed shows highly enhanced performance in comparison to existing accelerators. For example, the accelerator is capable of simultaneously improving resource utilization and data movement in...
Published: 1/7/2022
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Updated: 12/17/2021
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Inventor(s): Ahmed Louri, Jiajun Li
Keywords(s):
Category(s): Technology Classifications > Computers Electronics & Software > Artificial Intelligence, Technology Classifications > Computers Electronics & Software > Computing Architecture
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An Algorithm-Hardware Co-design Method for Convolutional Neural Networks
Researchers at GW have developed an algorithm-hardware co-design framework for Convolutional Neural Networks (CNN) directed towards mitigating the effects of computational irregularities in existing models. The framework disclosed allows for a reduced model size as to the associated system. For example, the algorithm disclosed utilizes centrosymmetric...
Published: 1/7/2022
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Updated: 12/17/2021
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Inventor(s): Jiajun Li, Ahmed Louri
Keywords(s):
Category(s): Technology Classifications > Computers Electronics & Software > Computing Architecture, Technology Classifications > Computers Electronics & Software > Artificial Intelligence
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Handheld microfluidic chip controller with smartphone app
GW researchers designed a completely automated, handheld smartphone controlled microfluidic liquid handling system. This is compatible with your microfluidic chip and application of choice. The intensive liquid handling steps required for biological sample preparation and assay automation can be a bottleneck in assay throughput. This small, handheld,...
Published: 1/7/2022
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Updated: 11/9/2021
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Inventor(s): Baichen Li, Zhenyu Li
Keywords(s):
Category(s): Technology Classifications > Computers Electronics & Software > Computing Architecture, Technology Classifications > Computers Electronics & Software > Robotics, Technology Classifications > Computers Electronics & Software > Processing Chips, Technology Classifications > Medical Devices > Diagnostic Devices
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Compact ultra-low power 2x2 Photonic Switch on Silicon
Researchers at George Washington University recently invented an optical switching technology for future photonics network-on-chip (NOC). This invention enables compact, cost-effective two orders of magnitude increases in bandwidth and dramatically more energy-efficient communication between CPU’s compared to traditional electrical interconnects....
Published: 1/7/2022
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Updated: 11/9/2021
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Inventor(s): Volker Sorger, Chenran Ye, Ke Liu
Keywords(s):
Category(s): Technology Classifications > Computers Electronics & Software > Sensors, Technology Classifications > Computers Electronics & Software > Computing Architecture
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Precision Firing Control of Pulsed Plasma Thrusters
Precision timing control of thruster operation of a spacecraft employing electric propulsion methods (e.g., pulsed electromagnetic plasma thrusters) is vital for space missions, and also difficult to achieve. When a thruster fires longer (or more powerfully), or shorter (or less powerfully), than required, or is fired in imprecise synchronization with...
Published: 1/7/2022
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Updated: 11/9/2021
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Inventor(s): Samudra Haque
Keywords(s):
Category(s): Technology Classifications > Computers Electronics & Software > Aviation, Technology Classifications > Computers Electronics & Software > Processing Chips, Technology Classifications > Computers Electronics & Software > Computing Architecture
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CC-Hunter: Microarchitecture-Level Framework and Method for Covert Timing Channel Detection
Researchers at The George Washington University have created a microarchitecture-level framework, which implements novel methods and algorithms developed for the detection of hacking covert timing channels that are used by Trojan/spy processes in order to leak confidential information from computing environments relying on shared hardware.
Information...
Published: 1/7/2022
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Updated: 11/4/2021
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Inventor(s): Guru Venkataramani, Jie Chen
Keywords(s):
Category(s): Technology Classifications > Computers Electronics & Software > Cybersecurity, Technology Classifications > Computers Electronics & Software > Computing Architecture
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EZ-PASS: An Energy & Performance-Efficient Power-gating Router Architecture for Scalable NoCs
Researchers at The George Washington University are developing an innovative method to design a performance and power-efficient network-on-chip for the parallel computing chips. The novel network-on-chip design invented at GW will significantly improve performance and power efficiency of parallel computing chips. Considering that the innovation can...
Published: 1/7/2022
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Updated: 10/6/2021
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Inventor(s): Hao Zheng, Ahmed Louri
Keywords(s):
Category(s): Technology Classifications > Computers Electronics & Software > Processing Chips, Technology Classifications > Computers Electronics & Software > Computing Architecture
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Learning-Based High-Performance, Energy-Efficient, and Secure Interconnection Design Framework
Researchers at the George Washington University have invented a novel network-on-chip framework, named TSA-NoC, which significantly improves on-chip security. The invented framework also minimizes the latency and cost of security techniques for simultaneously improving system-level performance and power.
As the market for parallel computing is growing...
Published: 1/7/2022
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Updated: 10/1/2021
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Inventor(s): Ke Wang, Hao Zheng, Ahmed Louri
Keywords(s):
Category(s): Technology Classifications > Computers Electronics & Software > Computing Architecture, Technology Classifications > Computers Electronics & Software > Processing Chips
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Forseti: Dynamic Chunk-level Reshaping for Data Processing on Heterogeneous Clusters
Researchers at the George Washington University have invented a novel algorithm for large-scale computing frameworks running on a distributed heterogeneous system to process large amounts of data. The algorithm minimizes job execution time by balancing residual workloads in heterogeneous environments and provide significant improvement in performance....
Published: 1/7/2022
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Updated: 10/1/2021
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Inventor(s): Sultan Alamro, Suresh Subramaniam, Tian Lan
Keywords(s):
Category(s): Technology Classifications > Computers Electronics & Software > Computing Architecture
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Network Design for Chiplet-based Manycore Architecture
Researchers at The George Washington University are developing a flexible interconnection network design, called Adapt-Net, for chiplet-based manycore architectures. The goal of Adapt-Net is to support the concurrent communication of diverse applications running at the same time, improving the energy-efficiency and performance of the manycore architecture....
Published: 1/7/2022
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Updated: 10/1/2021
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Inventor(s): Hao Zheng, Ke Wang, Ahmed Louri
Keywords(s):
Category(s): Technology Classifications > Computers Electronics & Software, Technology Classifications > Computers Electronics & Software > Computing Architecture
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